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CHAPTER 3 CPU
Figure 3.9-2 shows the example of multiple EIT processing.
Figure 3.9-2 Example of multiple EIT processing
Table 3.9-4 Execution sequence of EIT handler
Execution sequence of handler Factor
1
Reset
*1
2 Undefined instruction exception
3
Step trace trap
*2
4
INTE instruction
*2
5 NMI (for user)
6 INT instruction
7 User interrupt
8
Coprocessor absent trap
Coprocessor error trap
*1: Other factors are abandoned.
*2: If the INTE instruction is executed in steps, only EIT of the step trace trap generates
INTE instruction.
The factor by INTE is disregarded.
[Example]
(High) NMI generation
Priority level
(Low) INT instruction execute
Next execute
First execute
INT instruction handler
NMI handler
Main routine