Filter
Top Products
43
●
The RP to be referred by the RET:D command will not be effected even if the command within the delay
slot updates the RP.
[example]
RET:D ; Branch to address defined beforehand in RP
MOV R8, RP ; No effect on the return operation
...
●
The flag referred by the Bcc: Drel command is not effected by the delay slot command either.
[example]
ADD #1, R0 ; Flag change
BC:D Overflow ; Branch to execution result of above instruction
ANDCCR #0 ; Do not refer to this flag update in the above-mentioned branch instruction.
...
●
When RP is referred to for the command within the delay slot under the CALL:D command, the updated
contents will be read by the CALL:D command.
[example]
CALL:D Label ; Update RP and branch
MOV RP and R0 ; RP of an execution above-mentioned CALL:D result is forwarded.
..
■ Limitations for Branch Command with Delay
●
Instruction that can be placed in the delay slot
Only commands that satisfy the following conditions can be executed within the delay slot.
• 1 cycle instruction.
• No branch instruction.
• Instruction which does not influence operation even when order changes
The "1-cycle command" is a command in which "1", "a", "b", "c", or "d" is described in the cycle number
column within the commands list.
●
Step trace trap
Step trace trap will not be generated between execution of the branch command with delay slot and the
delay slot.
●
Interrupt/NMI
No interrupt/NUM is received between execution of the branch command with delay slot and the delay slot.
●
Undefined instruction exception
If an undefined command exists with the delay slot, undefined command exception will not be generated.
At this time, undefined instruction operates as NOP instruction.