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■ Operation of Step Trace Trap
When the T flag of the SCR within the PS is set, and the step trace function is set to Enabled, a trap is
generated per command execution and creates a break.
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Condition of step trace trap detection
•T Flag = 1
• There is no delayed branch instruction.
• While executing other than the INTE command and step trace trap processing routine.
When the above condition occurs, breaks at the command operation gap.
[Operation]
1. SSP-4 → SSP
2. PS → (SSP)
3. SSP-4 → SSP
4. Address of the following instruction→(SSP)
5. "00100" → ILM
6. "0" → S Flag
7. (TBR+3CCH)→ PC
When step trace traps are enabled by setting the T flag, NMI for users and user interruption are disabled.
Moreover, EIT by the INTE instruction is not generated.
■ Operation of Undefined Instruction Exception
If an undefined instruction is detected when decoding the command, an undefined instruction exception is
generated.
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Detection condition of undefined instruction exception
• 1) It is detected that it is undefined instruction at the decoding of the instruction.
• 2) Placed outside the delay slot (not immediately after the delay branch command).
When the above condition occurs, an undefined instruction exception is generated, and a break is created.
[Operation]
1. SSP-4 → SSP
2. PS → (SSP)
3. SSP-4 → SSP
4. PC → (SSP)
5. "0" → S Flag
6. (TBR+3C4H)→ PC
The address of the actual command that detected the undefined instruction exception is saved as the PC.