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■ Address Offset Register (SxAO)
Figure 17.2-3 Address offset register (SxAO)
Sets the start address offset of the serial data RAM.
■ Transfer Byte Number Setting Register (SxBR)
Figure 17.2-4 Transfer byte number setting register (SxBR)
[bit7]:BMOD
It is serial buffer mode control bit.
[bit6 to 0]:BC6 to 0
It is transfer byte number setting bit. The transfer byte number becomes the set value +1. Up to 128
bytes can be transferred. However, when transmission/reception data buffer independent mode is
specified by the BMOD bit, specification of BC6 will be invalid, and a maximum of 64 bytes will be
transferred.
7 6 5 4 3 2 1 0
-000 0000
B
Initial value
bit
WWWWWW
A6 A5 A4 A3 A2 A1 A0
Access
7 6 5 4 3 2 1 0
0XXX XXXX
B
Initial value
bit
BC4 BC3 BC2 BC1 BC0
R/W R/W R/W R/WR/W R/WR/W R/W
BM0D BC6 BC5
Access
0 Buffer overwrite mode
1 Transmission/reception data buffer independent mode