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3.12.12 Clock Series of Peripheral Resource ........................................................................................... 81
3.12.13 Watchdog Function ...................................................................................................................... 82
CHAPTER 4 External Bus Interface .............................................................................. 85
4.1 Overview of External Bus Interface .................................................................................................. 86
4.2 Block Diagram .................................................................................................................................. 87
4.3 Area of Bus Interface ........................................................................................................................ 88
4.4 Bus Interface ..................................................................................................................................... 89
4.5 Register of External bus Interface .................................................................................................... 90
4.5.1 Area Selection Register (ASR) and Area Mask Register (AMR) ................................................. 91
4.5.2 Area Mode Register 1 (AMD1) .................................................................................................... 94
4.5.3 Little Endian Register (LER) ........................................................................................................ 96
4.6 Bus Operation ................................................................................................................................... 97
4.6.1 Relationship between Data Bus Width and Control Signal .......................................................... 98
4.6.2 Bus Access of Big Endian ........................................................................................................... 99
4.6.3 Bus Access of Little Endian ....................................................................................................... 104
4.6.4 Comparison between Big Endian and Little Endian for External Access .................................. 108
4.7 Bus Timing ...................................................................................................................................... 112
4.8 Program Example of External Bus Operation ................................................................................. 113
CHAPTER 5 I/O Port ..................................................................................................... 117
5.1 Overview of I/O Port ....................................................................................................................... 118
5.2 Port 0 .............................................................................................................................................. 119
5.3 Port 1 .............................................................................................................................................. 121
5.4 Port 2, 3 .......................................................................................................................................... 123
5.5 Port 5 .............................................................................................................................................. 125
5.6 Port 6, 7 .......................................................................................................................................... 127
5.7 Port 4, 8, 9 ...................................................................................................................................... 131
5.8 Port A, B ......................................................................................................................................... 135
5.9 Port C, D ......................................................................................................................................... 137
CHAPTER 6 FG Input ................................................................................................... 141
6.1 Overview of FG Input ...................................................................................................................... 142
6.2 Capstan Input ................................................................................................................................. 143
6.3 Drum Input ...................................................................................................................................... 148
6.4 Reel Input ....................................................................................................................................... 152
CHAPTER 7 FRC Capture ............................................................................................ 157
7.1 Overview of FRC Capture ............................................................................................................... 158
7.2 Register of FRC Capture ................................................................................................................ 160
7.3 Operation of FRC Capture .............................................................................................................. 165
CHAPTER 8 Programmable Pulse Generator (PPG0, 1) ........................................... 167
8.1 Overview of Programmable Pulse Generator (PPG0, 1) ................................................................ 168
8.2 Register of Programmable Pulse Generator (PPG0, 1) .................................................................. 171
8.3 PPG Data RAM ............................................................................................................................... 173
8.4 Configuration of Frame Data .......................................................................................................... 174