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Appendix E Instruction List
Appendix E Instruction List
Instruction list of FR series is shown. Beforehand, the following matters are explained
for better understanding of the command list.
• How to Read the Instruction List
• Symbol of addressing mode
• Instruction format
■
How to Read the Instruction List
Instruction operand is XXX scr, dest (src--> dest).
1. The instruction name is shown.
*: The indication is the extend command whose command was extended or added by the assembler regardless of
the CPU specifications.
2. A specifiable Addressing mode is shown in the operand by the sign.
- Refer to the "Addressing mode symbols" for the symbol meanings.
3. The instruction format is shown.
4. The hexadecimal number is displayed to the instruction code.
5. The number of machine cycles is shown.
- a: It is a memory access cycle, and there is a possibility to postpone by the Ready function.
- b: It is a memory access cycle, and there is a possibility to postpone by the Ready function. If the
register that is targeted for LD operation is referred to by the command that immediately follows
it, an interlock is activated, and the execution cycle number will be increased by 1.
- c: When the command immediately following is one that reads or writes R15, SSP, or USP, an
interlock is activated, and the execution cycle number will be increased by 1, thus becoming 2.
- d: When the command immediately following refers to the MDH/MDL, an interlock is activated,
and the execution cycle number will be increased by 1, thus becoming 2.
- a, b, c, d, and the minimum are one cycle.
Mnemonic Type OP CYCLE NZVC Operation Remark
ADD
*ADD
Rj,
#s5,
,
,
Rj
Rj
A
C
,
,
AG
A4
,
,
1
1
,
,
CCCC
CCCC
,
,
Ri+Rj
Ri+s5
,
,
→Rj
→Ri
↓↓ ↓↓ ↓ ↓ ↓ ↓
1) 2) 3) 4) 5) 6) 6) 7)