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CHAPTER 3 CPU
3.8.2 Branch Command without Delay Slot
Branch Command without Delay Slot is described.
■ Branch Command without Delay Slot
The following commands execute the branch command without delay slot.
JMP @Ri CALL label12 CALL @Ri RET
BRA label9 BNO label9 BEQ label9 BNE label9
BC label9 BNC label9 BN label9 BP label9
BV label9 BNV label9 BLT label9 BGE label9
BLE label9 BGT label9 BLS label9 BHI label9
■ Operation of Branch Command without Delay Slot
Operation of ones without delay slots are absolutely executed in command rank order. The instruction
provided immediately before the branch instruction is not executed after branching.
[example]
; Row of instruction
ADD R1, R2 ;
BRA LABEL ; Branch instruction (delay slot none)
MOV R2, R3 ; Not executed
...
LABEL:STR 3 and @R4 ; The branch ahead
Execution cycle number for branch commands without delay slots will be 2 cycles branched, or 1 cycle
non-branched. As the appropriate command cannot be inserted into the delay slot, the command code
efficiency is better than the branch command with the delay slot described the NOP instruction. A balance
between execution speed and code efficiency can be struck by selecting either the operation with the delay
slot when effective commands can be set in the delay slot, or the operation without the delay slot when
effective commands cannot be set.