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CHAPTER 3 CPU
3.12.13 Watchdog Function
The watchdog function detects any uncontrolled programs. If writing A5
H
and 5A
H
to
the watchdog reset postpone register is not performed within the predetermined period
due to an uncontrolled program or suchlike, a watchdog reset request is generated by
the watchdog timer.
■ Block Diagram of Watchdog Control Section
Figure 3.12-15 Block Diagram of Watchdog control section
■ Activating Watchdog Timer
The watchdog timer starts operation by writing to the watchdog control register (WTCR). In this case, the
interval time for the watchdog timer is set by the WT1 and WT0 bits. In terms of interval time setup, only
the time set by the first writing is valid, and subsequent settings will be ignored.
[example]
LDI:8 #10000000b,R1 ; WT1, 0=10
LDI:32 #WTCR,R2
STB R1,@R2 ; Watchdog timer activation
Timebase
timer
M
P
X
A5&5A WDOGWTx
Latch
CTBR WPR RSRR
State decoder
Rese
generation F/F
Edge
Detect
Watchdog
F/F
Internal reset
State transition
control circuit
clr
Internal bus
Reset state transition
request signal