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Read (Read)/Reset command
In order to return from timing limit excess to read mode, issue the read/reset command sequence. Reads
data from the flash memory with the read cycle. The flash memory retains the read status until another
command is input.
The flash memory is automatically read/reset when the power is turned on. In this case, the data read
command in unnecessary.
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Program (Write)
Under CPU programming mode, writing is basically carried out per half-word. Writing requires four bus
cycles. There are two "unlock" cycles for the command sequence, and the writing set up command and
writing data cycle continue. Starts writing to the memory at the last writing cycle.
After executing the auto writing algorithm command sequence, the flash memory no longer requires
external control. The flash memory generates the appropriate write pulse automatically created within it,
and verifies the margin of the written cell. The auto writing operation ends when the bit 7 data matches the
data written to this bit by the data polling function (refer to "21.5 Auto Algorithm Execute State -
Hardware sequence flag"), takes this opportunity to return to read mode, and will not receive writing
addresses any longer. As a result, the flash memory requests the next valid address at this stage. In this
manner, data polling indicates that the memory is being written.
During writing, all commands written to the flash memory are ignored. If address data exists while
hardware reset is initiated at writing, such data cannot be guaranteed.
Writing is enabled in any address order or even if the sector boundary is exceeded. Data "0" cannot be
returned to data "1" by writing. If data "1" is written to data "0", the element is determined as defective by
the data polling algorithm, or it appears to be written as data "1". However, when data is read under the
reset/read mode, the data remains as "0". Data 0 can be changed to data 1 at the erase operation only.
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Chip Erasing
Chip erase (erasing all sectors in blocks) is carried out by accessing for six times. Firstly, two "unlock"
cycles exist, and continuously, the "set up" command is written. Until the chip erase command, two more
"unlock" cycles continue.
During a chip erase operation, the user does not need to write data to the flash memory prior to erasing.
While executing the auto erase algorithm, the flash memory automatically writes "0" patterns and verifies
before erasing all cells (pre-programmed). During this operation, the flash memory does not require
external control.
Auto erase starts by writing within the command sequence, ends when bit 7 becomes "1", and the flash
memory returns to read mode at this stage. The chip erasure time will be [time for sector erase x total
number of sectors + time for writing chip (preprogrammed)].