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20.2 Wait Control Register (WAITC)
The configuration/functions of the wait control register are shown.
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Wait Control Register (WAITC)
Figure 20.2-1 Wait Control Register (WAITC)
[bit7 to 3]:
There are unused bits.
[bit2]:
Be sure to write "0".
[bit1, 0]:WTC1, 0
There are specification bits of wait count.
7 6 5 4 3 2 1 0
---- -000
B
Initial value
bit
WTC1 WTC0
R/WW R/W
Address: 0007C4
H
Access
WTC1 WTC0 Wait count at φ=fch/2 at φ=fch
0 0 0Wait(2cycle) 200 ns Combination setting disable
0 1 1Wait(3cycle) 300 ns 150 ns
1 0 Reserved - -
1 1 Reserved - -