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CHAPTER 17 Serial I/O
17.3 Serial Data RAM
The serial data RAM has 128 bytes per channel. In this section, explanations are given
based on serial 0.
■
Serial Data RAM
For serial 0 of this RAM, the byte number set by the transfer byte number setting register from the address
"300
H
" is used as the serial data buffer.
When BMOD=0, the transfer address is 1st byte: "300
H
"; 2nd byte: "301
H
". When BMOD=1, the transfer
address is 1st byte: transmission data "300
H
", reception data "340
H
"; 2nd byte: transmission data "301
H
",
reception data "341
H
". In both cases, any area exceeding the byte number that has been set can be used as
data RAM. If other than 00
H
is set as the offset address, the value whereby the set value is added to the
address of 300
H
will be the 1st byte address.
Figure 17.3-1 Data RAM and transfer order (BMOD=0)
Figure 17.3-2 Data RAM and transfer order (BMOD=1)
Address Transmission/Reception Buffer
offset + 00300
H 1 Byte
offset + 00301H 2 Byte
offset + 00302H 3 Byte
offset + 00303H 4 Byte
offset + 0037DH 126 Byte
offset + 0037EH 127 Byte
offset + 0037FH 128 Byte
(When exceeding 00037F
H
by setting
the offset address)
Transmission Buffer Reception Buffer
offset + 00300
H 1 Byte offset + 00340H 1 Byte
offset + 00301H 2 Byte offset + 00341H 2 Byte
offset + 0033FH 64 Byte offset + 0037FH 64 Byte
(When exceeding 0033F
H
) (When exceeding 0037F
H
)