161
[bit1]:EIV1
It is EXI1 input edge detection polarity selection bit.
[bit0]:EIV0
It is EXI0 input edge detection polarity selection bit.
●
Capture input control register (CIC0)
Figure 7.2-2 Capture input control register (CIC0)
Note:
Do not use the read modify write command on this register.
[bit7]:RF1E
It is DVRFG1 input control bit.
[bit6]:RF0E
It is DVRFG0 input control bit.
[bit5]:CFGE
It is DVCFG input control bit.
0 Falling edge detection
1 Rising edge detection
0 Falling edge detection
1 Rising edge detection
7 6 5 4 3 2 1 0
0000 0000
B
Initial value
bit
RF1E RF0E CFGE DFGE EI1E EI0E S0FTEI2E
WR/W R/WR/W R/WR/W R/WR/W
Access
Address: 000065
H
0 Input interdiction
1 Input permission
0 Input interdiction
1 Input permission
0 Input interdiction
1 Input permission