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CHAPTER 6 FG Input
6.4 Reel Input
The reel input section comprises of the 8-bit programmable divider and mask timer.
This section explains the register which controls the operation of each section.
■ Block Diagram of Reel Input
Figure 6.4-1 Block Diagram of Reel Input
■ Register List of Reel Input
Figure 6.4-2 Register list of Reel Input
SR
Internal bus
RLxDRxFCLRRxMTSRxMTCSRLC RLxMTC
00
Mask Timer
00
QS
R1
R2
8bi t
2
14
/fch
2
10
/fch
RFGx
Programmable devider
Write ST
Load (Sync)
Load (Sync)
(from FRC
FRC9, 13)
M
P
X
DVCFG Free
(Mask Disable
Mask End
START (Mask Enable)
DVRFGx
(to FRC)
RS-FF
RLxDVC
70bit
RLC Reel control register
RL0DVC
Reel 0 input control register
RL0MTC
Reel 0 mask timer control register
RL1DVC
Reel 1 input control register
RL1MTC
Reel 1 mask timer control register
Address: 000057
H
000058H
000059H
00005AH
00005BH