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Appendix E Instruction List
■
32-bit Normal Divergence Macro Instruction
Table E-18 32-bit Normal divergence macro instruction
Mnemonic Operation Remark
*CALL32 label32,Ri Address of the following instruction
→
RP,
label32→
PC
Ri: Temporary register (Refer to reference 1.)
*BRA32 label32,Ri
*BEQ32 label32,Ri
*BNE32 label32,Ri
*BC32 label32,Ri
*BNC32 label32,Ri
*BN32 label32,Ri
*BP32 label32,Ri
*BV32 label32,Ri
*BNV32 label32,Ri
*BLT32 label32,Ri
*BGE32 label32,Ri
*BLE32 label32,Ri
*BGT32 label32,Ri
*BLS32 label32,Ri
*BHI32 label32,Ri
label32
→
PC
if(Z==1)thenlabel32→
PC
↑
s/Z==0
↑
s/C==1
↑
s/C==0
↑
s/N==1
↑
s/N==0
↑
s/V==1
↑
s/V==0
↑
s/VxorN==1
↑
s/VxorN==0
↑
s/(VxorN)orZ==1
↑
s/(VxorN)orZ==0
↑
s/CorZ==1
↑
s/CorZ==0
Ri: Temporary register (Refer to reference 2.)
Ri: Temporary register (Refer to reference 3.)
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
Reference 1: CALL32
1) When label20-PC-2 is - 0x100 - + 0xfe, the instruction is generated as follows.
CALL label12
2) When label32-PC-2 is outside the area as per 1) and includes an external reference symbol, the command is generated as
follows.
LDI:32 #label32,Ri
CALL @Ri
Reference 2: BRA32
1) When label32-PC-2 is - 0x100 - + 0xfe, the instruction is generated as follows.
BRA label9
2) When label32-PC-2 is outside the area as per 1) and includes an external reference symbol, the command is generated as
follows.
LDI:32 #label32,Ri
JMP @Ri
Reference 3: Bcc32
1) When label32-PC-2 is - 0x100 - + 0xfe, the instruction is generated as follows. x
Bcc label9
2) When label32-PC-2 is outside the area as per 1) and includes an external reference symbol, the command is generated as
follows.
Bxcc false xcc is a contradiction condition of cc.
LDI:32 #label32,Ri
JMP @Ri
false: