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CHAPTER 18 10-bit General-purpose Prescaler
Figure 18.3-3 Update timing of reload data latch
●
Update mode operation by both edges of PPG output
Under this mode, exactly the same operation as the update mode by rewriting the data register is carried out
except for detecting both edges of the PPG output and executing load requests per edge. When this mode is
selected, no load request is generated by rewriting the data register.
Data update
disable period
CLK
Data Register Value
Write STB
xx nn yy
xx nn yy
Load Request
Load Data Latch
Load Timing