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CHAPTER 10 Timer
■ Timer Data Register 1, 0 (TxDR1, TxDR0)
Figure 10.6-3 Timer data register 1, 0 (TxDR1, TxDR0)
The timer data register value is loaded to the compare latch, and used as data compared to the counter
value. Use the setting of the interval time under the timer mode. Also used to set the number of events to be
detected under the external clock mode.
■ Count Data Register (TxCD1, TxCD0)
Figure 10.6-4 Count data register (TxCD1, TxCD0)
Read operation under the timer/counter mode reads the counter value.
7 6 5 4 3 2 1 0
XXXX XXXX
B
Initial value
bit
R/W R/W R/W R/W R/W R/W R/W R/W
Access
7 6 5 4 3 2 1 0
XXXX XXXX
B
Initial value
bit
R/W R/W R/W R/W R/W R/W R/W R/W
Access
7 6 5 4 3 2 1 0
XXXX XXXX
B
Initial value
bit
RRRRRRRR
Access
7 6 5 4 3 2 1 0
XXXX XXXX
B
Initial value
bit
RRRRRRRR
Access