Fujitsu FR20 Home Theater Server User Manual


 
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3.10 Reset Sequence
This section explains the reset when the CPU is the operation state.
Reset Factor
The reset factor is as follow.
Input from external reset pin
Software reset by the SRST bit operation of the standby control register (STCR)
Count up of watchdog timer
•Power on reset
Initialization by Reset
The reset factor is generated, the CPU is initialized.
Releasing from the external reset pin or software reset
The pin is set to the predetermined state.
Each resource in the device is put in the reset state. The control register is initialized to the
predetermined value.
The lowest gear is selected for the clock.
Reset Sequence
When a reset factor is released, the CPU executes the following reset sequence.
(000FFFFC
H
) PC
Note:
After reset, operation mode needs to be set by the mode register setting.