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16.4 State Transition of 10-bit A/D Converter
Figure 16.4-1 shows the state transition of 10-bit A/D converter.
■ State Transition of 10-bit A/D Converter
Figure 16.4-1 State transition of 10-bit A/D converter
The operation state can be known by the SCS, HCS, and HCNS bit of the ADCH register.
A/D Conversion wait
Hard Converting
Hard Converting
Soft Converting
Hard Converting
Soft Conversion request
Soft Conversion end
Hard Conversion end
Hard Conversion request
Soft Conversion request
Hard Conversion end
Hard Conversion end
Hard Conversion request
Hard Conversion request
Hard Conversion end
Hard Conversion request
Soft Conversion request
000
001
011
111
110
010
Hard Converting
With Soft Converting
reservation
With ADST1 Converting
reservation
With ADST1 Converting reservation
With Soft Converting reservation
HCNS HCS SCS Status Description
0 0 0 Analog to digital conversion wait
0 0 1 Analog to digital conversion by soft start
0 1 0 Analog to digital conversion by hard start (0 and 1)
0 1 1
Analog to digital conversion by hard start (0 and 1)
Retention of soft start
1 1 0
Analog to digital conversion by hard start 0
Retention of soft start 1
1 1 1
Analog to digital conversion by hard start 0
Retention of soft start and hard start 1