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CHAPTER 7 FRC Capture
7.1 Overview of FRC Capture
The FRC capture section has built-in 24-bit free-run counter and uses FIFO format.
■ Feature of FRC Capture
• Built-in 24-bit free-run counter (Minimum resolution 50 ns:@20 MHz)
• Built-in FIFO (Data 21-bit x 8, factor 8-bit x 8)
■ Register List of FRC Capture
Figure 7.1-1 Register list of FRC capture
70bit
Capture input control register
Capture control register
Capture source register
Capture data register
Address:
000060
H
000061
H
000062
H
000063
H
000064
H
000065
H
000066
H
000067
H
000068
H
000069
H
00006A
H
00006B
H
FRCD2
FRCD1
FRCD0
CIC1
CIC0
CAPC
CAPS
CAPD2
CAPD1
CAPD0
FRC count data register