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Appendix E Instruction List
■
Direct Addressing Instruction
■
Resource Instruction
■
Coprocessor Control Instruction
Table E-20 Direct addressing instruction
Mnemonic Type OP CYCLE NZVC Operation Remark
DMOV @dir10, R13
DMOV R13, @dir10
DMOV @dir10, @R13+
DMOV @R13+, @dir10
*
DMOV @dir10, @-R15
DMOV @R15+, @dir10
D
D
D
D
D
D
08
18
0C
1C
0B
1B
b
a
2a
2a
2a
2a
----
----
----
----
----
----
(dir10)
→
R13
R13→
(dir10)
(dir10) →
(R13),R13+=4
(R13)
→
(dir10),R13+=4
R15-=4, (R15) →
(dir10)
(R15) →
(dir10),R15+=4
Word
Word
Word
Word
Word
Word
DMOVH @dir9, R13
DMOVH R13, @dir9
DMOVH @dir9, @R13+
DMOVH @R13+, @dir9
*
D
D
D
D
09
19
0D
1D
b
a
2a
2a
----
----
----
----
(dir9)
→
R13
R13→
(dir9)
(dir9)
→
(R13),R13+=2
(R13) →
(dir9),R13+=2
Half word
Half word
Half word
Half word
DMOVB @dir8, R13
DMOVB R13, @dir8
DMOVB @dir8, @R13+
DMOVB @R13+, @dir8
*
D
D
D
D
0A
1A
0E
1E
b
a
2a
2a
----
----
----
----
(dir8)
→
R13
R13→
(dir8)
(dir8) →
(R13),R13++
(R13)
→
(dir8),R13++
Byte
Byte
Byte
Byte
Note:
The assembler calculates and sets values as follows in the dir8, dir9, and dir10 fields.
Dir8→dir, dir9/2→dir, dir10/4→dirdir8, dir9, dir10 are without sign.
Table E-21 resource instruction
Mnemonic Type OP CYCLE NZVC Operation Remark
LDRES @Ri+, #u4
STRES #u4, @Ri+
C
C
BC
BD
a
a
----
----
(Ri)
→
Resource of u4
Ri+=4
(Ri)
→
Resource of u4
Ri+=4
u4: Channel number
u4: Channel number
Table E-22 Coprocessor control instruction
Mnemonic Type OP CYCLE NZVC Operation Remark
COPOP #u4, #u8, CRj, CRi
COPLD #u4, #u8, Rj, CRi
COPST #u4, #u8, CRj, Ri
COPSV #u4, #u8, CRj, Ri
E
E
E
E
9F-C
9F-D
9F-E
9F-F
2+a
1+2a
1+2a
1+2a
----
----
----
----
Operation instruction
Rj
→
CRi
CRj
→
Ri
CRj→
Ri Error trap none
Note:
• {CRi | CRj}:=CR0 | CR1 | CR2 | CR3 | CR4 | CR5 | CR6 | CR7 | CR8 | CR9 | CR10 | CR11 | CR12 | CR13 | CR14 | CR15
u4:= channel specification
u8:= command specification