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CHAPTER 16 10-bit A/D Converter
■ A/D Operation by Hard Conversion
A/D conversion using hardware conversion can be operated by the ADST0 (PPG0) or ADST1 (PPG1,
RTG) factors, and operation starts when the ADST0 or ADST1 rising edge is detected. Both ADST0 and
ADST1 can select eight analog input pins (AN0 to AN7), with ADST0 being selected by the OD26 to 24
signals from the PPG0, and ADST1 being selected by the ADCL register Hi2 to 0.
When the A/D conversion is performed, the HCS bit of the ADCH register is set to "1". When conversion
ends, the HCS bit of the ADCH register is reset to "0", and the HCEF bit of the HCSR register is set to "1".
If the conversion completion interrupt needs to be generated, the HCIS bit of the HCSR register shall be set
to "1".
The A/D converted results can be stored FIFO up to six times, and they are automatically input on FIFO
basis at the end of A/D conversion. FIFO data can be retrieved by reading the HCFD register, then after
reading is automatically incremented in FIFO format, and the next data is output.
However, when the HCFD register is read through byte access, it is not incremented in FIFO format.
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Generation condition of hard start request signal
When OD027(PPG0) & EQ(PPG0)=1, the ADST0 signal generates.
When OD113 & EQ(PPG1)=1, the ADST1 signal generates.
When RTO04 & EQ0(RTG0)=1, the ADST1 signal generates.
When RTO14 & EQ1(RTG1)=1, the ADST1 signal generates.
When RTO24 & EQ2(RTG2)=1, the ADST1 signal generates.
■ Priority Order of A/D Conversion
In terms of the A/D conversion initiation factors, three types of initiation can be executed, namely initiation
by software, and initiation by two types of hardware (ADST0 & ADST1), and their priority ranking is as
follows.
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When initiation by hardware enters at software operation
Suspend the operation by software and perform the operation by hardware. When hardware operation ends,
software operation automatically restarts.
●
When ADST0 initiation enters at operation by ADST1 initiation
Hold the operation by ADST1 initiation and perform the operation by ADST0 initiation. When the
operation initiated by the ADST0 ends, ADST1 automatically restarts.
Note:
Conversion initiation requests with the same factor are masked during conversion by hardware.
Priority order High ADST0 initiation by hardware
to ADST1 initiation by hardware
Low Initiation by software