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S3F80JB ADDRESS SPACES
2-7
REGISTER PAGE POINTER (PP)
The S3C8/S3F8-series architecture supports the logical expansion of the physical 333-byte internal register files
(using an 8-bit data bus) into as many as 16 separately addressable register pages. Page addressing is controlled
by the register page pointer PP (DFH, Set 1, Bank0). In the S3F80JB microcontroller, a paged register file
expansion is not implemented and the register page pointer settings therefore always point to “page 0”.
Following a reset, the page pointer's source value (lower nibble) and destination value (upper nibble) are always
'0000'automatically. Therefore, S3F80JB is always selected page 0 as the source and destination page for
register addressing. These page pointer (PP) register settings, as shown in Figure 2-4, should not be modified
during normal operation.
NOTE:
A hardware reset operation writes the 4-bit destination and source values shown
above to the register page pointer. These values should not be modified to
address other pages.
Register Page Pointer (PP)
DFH ,Set 1, Bank0, R/W
.7 .6 .5 .4 .3 .2 .1 .0
Destination Register Page Seleciton Bits:
Destination: page 0
Source Register Page Selection Bits:
Source: page 0
MSB LSB
0 0 0 00 0 0 0
Figure 2-4. Register Page Pointer (PP)