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S3F80JB CONTROL REGISTERS
4-33
P345CON — Port3[4:5] Control Register E1H Set1 Bank1
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
Reset Value
0 1 0 1 – – – 0
Read/Write
R/W R/W R/W R/W – – – R/W
Addressing Mode
Register addressing mode only
.7 and .6
P3.5 Mode Selection Bits
0 0 C-MOS input mode
0 1 Open-drain output mode
1 0 Push-pull output mode
1 1 C-MOS input with pull up mode
.5 and .4 P3.4 Mode Selection Bits
0 0 C-MOS input mode
0 1 Open-drain output mode
1 0 Push-pull output mode
1 1 C-MOS input with pull up mode
.3 and .1
Not used for S3F80JB.
.0 Port 4 Control Register Selection Bit
0 P4CON Register selection
1 P4CONH/P4CONL Register selection
NOTE: After CPU reset, P3.4 and P3.5 will be Open-drain output mode by the reset value of P345CON register at E1H,
Set1, Bank1. P345CON will be initialized as “50h” to set P3.4 into the open-drain output mode after reset operation.
Port4 control register P4CON will be selected by the reset value of P345CON.0 bit. If you use the Port4 input and
output mode, set P345CON.0 to “1”.