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S3F80JB CONTROL REGISTERS
4-17
IRQ — Interrupt Request Register DCH Set1 Bank0
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
Reset Value
0 0 0 0 0 0 0 0
Read/Write
R R R R R R R R
Addressing Mode
Register addressing mode only
.7 Level 7 (IRQ7) Request Pending Bit; External Interrupts P0.7–P0.4
0 Not pending
1 Pending
.6 Level 6 (IRQ6) Request Pending Bit; External Interrupts P0.3–P0.0
0 Not pending
1 Pending
.5 Level 5 (IRQ5) Request Pending Bit; External Interrupts P2.7–P2.4
0 Not pending
1 Pending
.4 Level 4 (IRQ4) Request Pending Bit; External Interrupts P2.3–P2.0
0 Not pending
1 Pending
.3 Level 3 (IRQ3) Request Pending Bit; Timer 2 Match/Capture or Overflow
0 Not pending
1 Pending
.2 Level 2 (IRQ2) Request Pending Bit; Counter A Interrupt
0 Not pending
1 Pending
.1 Level 1 (IRQ1) Request Pending Bit; Timer 1 Match/Capture or Overflow
0 Not pending
1 Pending
.0 Level 0 (IRQ0) Request Pending Bit; Timer 0 Match/Capture or Overflow
0 Not pending
1 Pending