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S3F80JB INSTRUCTION SET
6-51
LDB — Load Bit
LDB dst,src.b
LDB dst.b,src
Operation: dst(0) ← src(b)
or
dst(b) ← src(0)
The specified bit of the source is loaded into bit zero (LSB) of the destination, or bit zero of the
source is loaded into the specified bit of the destination. No other bits of the destination are
affected. The source is unaffected.
Flags: No flags are affected.
Format:
Bytes Cycles Opcode
(Hex)
Addr Mode
dst
src
opc
dst | b | 0
src
3 6 47 r0 Rb
opc
src | b | 1
dst
3 6 47 Rb r0
NOTE: In the second byte of the instruction formats, the destination (or source) address is four bits, the bit
address 'b' is three bits, and the LSB address value is one bit in length.
Examples: Given: R0 = 06H and general register 00H = 05H:
LDB R0,00H.2 → R0 = 07H, register 00H = 05H
LDB 00H.0,R0 → R0 = 06H, register 00H = 04H
In the first example, destination working register R0 contains the value 06H and the source
general register 00H the value 05H. The statement "LD R0,00H.2" loads the bit two value of the
00H register into bit zero of the R0 register, leaving the value 07H in register R0.
In the second example, 00H is the destination register. The statement "LD 00H.0,R0" loads bit
zero of register R0 to the specified bit (bit zero) of the destination register, leaving 04H in general
register 00H.