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102 Programmer’s Reference Manual
AC ’97 Modem Controller Registers (D30:F3)
3.2.5 x_PICB—Position in Current Buffer Register
(Modem—D30:F3)
I/O Address: MBAR + 08h (MIPICB), Attribute: RO
MBAR + 18h (MOPICB),
Default Value: 0000h Size: 16 bits
Lockable: No Power Well: Core
Software can read the registers at the offsets 08h, 0Ah, and 0Bh by performing a 32-bit read from
the address offset 08h. Software can also read this register individually by doing a single, 16-bit
read to offset 08h. Reads across DWord boundaries are not supported.
3.2.6 x_PIV—Prefetch Index Value Register
(Modem—D30:F3)
I/O Address: MBAR + 0Ah (MIPIV), Attribute: RO
MBAR + 1Ah (MOPIV)
Default Value: 00h Size: 8 bits
Lockable: No Power Well: Core
Software can read the registers at the offsets 08h, 0Ah, and 0Bh by performing a 32-bit read from
the address offset 08h. Software can also read this register individually by doing a single, 8-bit read
to offset 0Ah. Reads across DWord boundaries are not supported.
Bit Description
15:0
Position In Current Buffer[15:0] — RO. These bits represent the number of samples left to be
processed in the current buffer.
Bit Description
7:5 Hardwired to 0
4:0
Prefetched Index Value [4:0] — RO. These bits represent which buffer descriptor in the list has
been prefetched.