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6 Programmer’s Reference Manual
Contents
1.1.50 L1ADDU—Link 1 Upper Address Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................35
1.2 Intel
®
High Definition Audio Memory Mapped Configuration Registers
(Intel
®
High Definition Audio— D27:F0) .............................................................................36
1.2.1 GCAP—Global Capabilities Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................40
1.2.2 VMIN—Minor Version Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................40
1.2.3 VMAJ—Major Version Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................40
1.2.4 OUTPAY—Output Payload Capability Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................41
1.2.5 INPAY—Input Payload Capability Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................41
1.2.6 GCTL—Global Control Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................42
1.2.7 WAKEEN—Wake Enable Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................43
1.2.8 STATESTS—State Change Status Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................43
1.2.9 GSTS—Global Status Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................44
1.2.10 OUTSTRMPAY—Output Stream Payload Capability
(Intel
®
High Definition Audio Controller—D27:F0).................................................44
1.2.11 INSTRMPAY—Input Stream Payload Capability
(Intel
®
High Definition Audio Controller—D27:F0).................................................45
1.2.12 INTCTL—Interrupt Control Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................46
1.2.13 INTSTS—Interrupt Status Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................47
1.2.14 WALCLK—Wall Clock Counter Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................47
1.2.15 SSYNC—Stream Synchronization Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................48
1.2.16 CORBLBASE—CORB Lower Base Address Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................48
1.2.17 CORBUBASE—CORB Upper Base Address Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................49
1.2.18 CORBWP—CORB Write Pointer Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................49
1.2.19 CORBRP—CORB Read Pointer Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................49
1.2.20 CORBCTL—CORB Control Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................50
1.2.21 CORBST—CORB Status Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................50
1.2.22 CORBSIZE—CORB Size Register
Intel
®
High Definition Audio Controller—D27:F0) ..................................................50
1.2.23 RIRBLBASE—RIRB Lower Base Address Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................51
1.2.24 RIRBUBASE—RIRB Upper Base Address Register
(Intel
®
High Definition Audio Controller—D27:F0).................................................51