Intel 307017-001 TV Cables User Manual


 
Programmer’s Reference Manual 21
Intel
®
High Definition Audio Controller Registers (D27:F0)
1.1.16 CAPPTR—Capabilities Pointer Register (Audio—D30:F2)
Address Offset: 34h Attribute: RO
Default Value: 50h Size: 8 bits
This register indicates the offset for the capability pointer.
1.1.17 INTLN—Interrupt Line Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 3Ch Attribute: R/W
Default Value: 00h Size: 8 bits
1.1.18 INTPN—Interrupt Pin Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 3Dh Attribute: RO
Default Value: See Description Size: 8 bits
Bit Description
7:0
Capabilities Pointer (CAP_PTR) — RO. This field indicates that the first capability pointer offset is
offset 50h (Power Management Capability).
Bit Description
7:0
Interrupt Line (INT_LN) — R/W. This data is not used by the Intel
®
ICH7. It is used to communicate
to software the interrupt line that is connected to the interrupt pin.
Bit Description
7:4 Reserved.
3:0
Interrupt Pin — RO. This reflects the value of D27IP.ZIP (Chipset Config Registers:Offset 3110h:
bits 3:0).