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74 Programmer’s Reference Manual
AC ’97 Audio Controller Registers (D30:F2)
2.1.23 PCS—Power Management Control and Status Register
(Audio—D30:F2)
Address Offset: 54h–55h Attribute: R/W, R/WC
Default Value: 0000h Size: 16 bits
Lockable: No Power Well: Resume
Bit Description
15
PME Status (PMES) — R/WC. This bit resides in the resume well. Software clears this bit by writing
a 1 to it.
0 = PME# signal Not asserted by AC ‘97 controller.
1 = This bit is set when the AC ’97 controller would normally assert the PME# signal independent of
the state of the PME_En bit.
14:9 Reserved — RO.
8
Power Management Event Enable (PMEE) — R/W.
0 = Disable.
1 = Enable. When set, and if corresponding PMES is also set, the AC '97 controller sets the
AC97_STS bit in the GPE0_STS register
7:2 Reserved—RO.
1:0
Power State (PS) — R/W. This field is used both to determine the current power state of the AC ’97
controller and to set a new power state. The values are:
00 = D0 state
01 = not supported
10 = not supported
11 = D3
HOT
state
When in the D3
HOT
state, the AC ’97 controller’s configuration space is available, but the I/O and
memory spaces are not. Additionally, interrupts are blocked.
If software attempts to write a value of 10b or 01b in to this field, the write operation must complete
normally; however, the data is discarded and no state change occurs.