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Programmer’s Reference Manual 19
Intel
®
High Definition Audio Controller Registers (D27:F0)
1.1.10 LT—Latency Timer Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 0Dh Attribute: RO
Default Value: 00h Size: 8 bits
1.1.11 HEADTYP—Header Type Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 0Eh Attribute: RO
Default Value: 00h Size: 8 bits
1.1.12 HDBARL—Intel
®
High Definition Audio Lower Base
Address Register
(Intel
®
High Definition Audio—D27:F0)
Address Offset: 10h-13h Attribute: R/W, RO
Default Value: 00000004h Size: 32 bits
1.1.13 HDBARU—Intel
®
High Definition Audio Upper Base
Address Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 14h-17h Attribute: R/W
Default Value: 00000000h Size: 32 bits
Bit Description
7:0 Latency Timer — RO. Hardwired to 00
Bit Description
7:0 Header Type — RO. Hardwired to 00.
Bit Description
31:14
Lower Base Address (LBA) — R/W. This field contains the base address for the Intel
®
High
Definition Audio controller’s memory mapped configuration registers; 16 KB are requested by
hardwiring bits 13:4 to 0s.
13:4 RO. Hardwired to 0’s
3 Prefetchable (PREF) — RO. Hardwired to 0 to indicate that this BAR is NOT prefetchable.
2:1
Address Range (ADDRNG) — RO. Hardwired to 10b, indicating that this BAR can be located
anywhere in 64-bit address space.
0 Space Type (SPTYP) — RO. Hardwired to 0. Indicates this BAR is located in memory space.
Bit Description
31:0
Upper Base Address (UBA) — R/W. This field provides the upper 32 bits of the Base address for
the Intel
®
High Definition Audio controller’s memory mapped configuration registers.