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118 Programmer’s Reference Manual
Intel® High Definition Audio BIOS Considerations
; dx is the map of SDI pins, and the bits will be cleared as the
; associated codecs are serviced
mov dx, word ptr es:[ebx+HDAudio_MMIO_STATESTS]
InitCurrentCodec:
dec cx
btr dx, cx ; Test for 'cx'th codec
jnc NextSDI
;----------------------------------------------------------------------------
;1. Ensure Intel® HD Audio device is enabled and BARs are programmed
;
; a. Program Intel® HD Audio BARs with temporary values
; b. Enable memory space and bus mastering
; c. Deassert CRST#
;----------------------------------------------------------------------------
; a. Set the AZ/AC'97# bit to 1 to enable Intel® HD Audio signal mode
(D27:F0:Reg40h[0]=1b)
mov ah, HDAudio_AZCTL_OFFSET
mov al, HDAudio_AZCTL_OFFSET_AZ_AC97
_SET_PCI_FAR HDAudio
; b. Program the Intel® HD Audio AZBAR at PCI config space 10h-17h
to a temporary address
mov ah, PCI_BAR0
mov ebx, MKF_HDAudio_BASE_ADDRESS
_WRITE_PCI_DWORD_FAR HDAudio
; c. Enable memory space and bus mastering for Intel® HD Audio
mov al, CMD_MEM_SPACE+CMD_BUS_MASTER
_SET_PCI_FAR HDAudio
; d. Deassert the CRST bit in Intel® HD Audio to cause the link to start
up(AZBAR+08h[0]=1)
or byte ptr es:[ebx+HDAudio_MMIO_GCTL],
HDAudio_MMIO_GCTL_CRST
;----------------------------------------------------------------------------
;2. Read the Vendor ID/Device ID pair from the attached codec
;
; a. Poll the ICB bit in the ICS register at AZBAR+68h[0] until it returns 0
; b. Write verb c00F0000h (dword) to the IC register at AZBAR+60h;
where 'c'