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Programmer’s Reference Manual 27
Intel
®
High Definition Audio Controller Registers (D27:F0)
1.1.27 MMLA—MSI Message Lower Address Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 64h–67h Attribute: RO, R/W
Default Value: 00000000h Size: 32 bits
1.1.28 MMUA—MSI Message Upper Address Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 68h–6Bh Attribute: R/W
Default Value: 00000000h Size: 32 bits
1.1.29 MMD—MSI Message Data Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 6Ch–6Dh Attribute: R/W
Default Value: 0000h Size: 16 bits
1.1.30 PXID—PCI Express* Capability ID Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 70h-71h Attribute: RO
Default Value: 0010h Size: 16 bits
Bit Description
31:2 Message Lower Address (MLA) — R/W. Lower address used for MSI message.
1:0 Reserved.
Bit Description
31:0 Message Upper Address (MUA) — R/W. Upper 32-bits of address used for MSI message.
Bit Description
15:0 Message Data (MD) — R/W. Data used for MSI message.
Bit Description
15:8
Next Capability (Next) — RO. Hardwired to 0. Indicates that this is the last capability structure in the
list.
7:0
Cap ID (CAP) — RO. Hardwired to 10h. Indicates that this pointer is a PCI Express* capability
structure.