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Programmer’s Reference Manual 9
Contents
(Modem—D30:F3) .................................................................................................93
3.1.11 MBAR—Modem Base Address Register (Modem—D30:F3) ................................94
3.1.12 SVID—Subsystem Vendor Identification Register
(Modem—D30:F3) .................................................................................................94
3.1.13 SID—Subsystem Identification Register (Modem—D30:F3) .................................95
3.1.14 CAP_PTR—Capabilities Pointer Register (Modem—D30:F3)...............................95
3.1.15 INT_LN—Interrupt Line Register (Modem—D30:F3).............................................95
3.1.16 INT_PIN—Interrupt Pin Register (Modem—D30:F3).............................................96
3.1.17 PID—PCI Power Management Capability Identification
Register (Modem—D30:F3)...................................................................................96
3.1.18 PC—Power Management Capabilities Register
(Modem—D30:F3) .................................................................................................96
3.1.19 PCS—Power Management Control and Status Register
(Modem—D30:F3) .................................................................................................97
3.2 AC ’97 Modem I/O Space (D30:F3)....................................................................................98
3.2.1 x_BDBAR—Buffer Descriptor List Base Address Register
(Modem—D30:F3) ...............................................................................................100
3.2.2 x_CIV—Current Index Value Register (Modem—D30:F3) ..................................100
3.2.3 x_LVI—Last Valid Index Register (Modem—D30:F3) .........................................100
3.2.4 x_SR—Status Register (Modem—D30:F3) .........................................................101
3.2.5 x_PICB—Position in Current Buffer Register
(Modem—D30:F3) ...............................................................................................102
3.2.6 x_PIV—Prefetch Index Value Register
(Modem—D30:F3) ...............................................................................................102
3.2.7 x_CR—Control Register (Modem—D30:F3)........................................................103
3.2.8 GLOB_CNT—Global Control Register (Modem—D30:F3)..................................104
3.2.9 GLOB_STA—Global Status Register (Modem—D30:F3)....................................105
3.2.10 CAS—Codec Access Semaphore Register
(Modem—D30:F3) ...............................................................................................107
4 Intel® High Definition Audio BIOS Considerations................................................................109
4.1 Intel
®
High Definition Audio/AC’ 97 Signal Mode Selection .............................................109
4.1.1 Intel
®
High Definition Audio/AC’ 97 Codec Detection..........................................110
4.1.2 Intel
®
High Definition Audio Codec Initialization ..................................................112
4.1.2.1 Intel
®
High Definition Audio Codec Architecture Introduction ..............112
4.1.2.2 Codec Verb Table................................................................................113
4.1.2.3 Codec Initialization Programming Sequence .......................................116
4.1.2.4 Codec Initialization Sample Code ........................................................117
4.1.3 Intel
®
High Definition Audio Codec Initialization on S3 Resume .........................125
4.2 Intel
®
High Definition Audio Controller Configuration .......................................................125
4.3 Intel
®
High Definition Audio PME Event ...........................................................................126