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FX Series Programmable Controllers Execution Times And Instructional Hierarchy 7
7-2
Note 1:
• “n” in the formulae to calculate the ON/OFF execution time, refers to the number of STL
instructions at the current parallel/mer
g
e branch. Thus the value of “n” will fall in the
ran
g
e 1 to 8.
Mnemonic
Object
Devices
Steps
Execution Time in
µ
sec
FX
0
, FX
0S
FX
0N
FX
(< Ver 3.07)
FX
(> Ver 3.07)
,
FX
2C
FX
2N(C)
ON OFF ON OFF ON OFF ON OFF ON OFF
OUT
Y, M 1 3.2 3.2 0.74 0.48 0.08
S 2 7.0 7.2 7.0 7.2 50.0 48.1 26 24 24.4 24.3
Special M 2 7.8 7.4 8.2 7.8 38.1 38.8 28 20 0.16
T-K 3 21.8 19.4 25.2 21.0 72.4 52.6 45 34 42.3 37.4
T-D 3 23.4 21.0 27.2 23.0 80.0 52.6 53 34 42.2 37.2
C-K (16 bit) 3 14.6 17.8 15.6 67.9 40.3 42 25 25.5 24.9
C-D (16 bit) 3 16.2 19.8 17.6 75.5 40.3 47 25 25.3 25.0
C-K (32 bit) 5 12.5 6.0 16.0 8.6 82.3 40.3 51 25 25.3 24.9
C-D (32 bit) 5 13.9 6.0 18.0 8.6 89.9 40.3 55 25 25.2 24.9
SET
Y, M 1 3.6 2.0 3.6 2.0 0.74 0.48 0.08
S
2
6.8 2.6 7.0 2.8 39.0 25.5 24 16 23.7 17.2
S when used in
an STL step
(see note 1)
Function Not Available
45.2+
14.2n
25.5
28 +
9n
16
27.3+
12.6n
17.2
Special M 2 7.4 2.4 7.8 2.6 41.9 28.5 26 18 0.16
RST
Y, M 1 3.4 1.8 3.6 1.8 0.74 0.48 0.08
S 2 6.0 2.6 6.2 2.8 40.5 25.5 23 16 23.1 17.3
Special M 2 7.4 2.4 7.8 2.6 41.8 28.9 26 18 0.16
T, C 2 20.8 18.0 22.4 19.6 50.1 38.3 31 24 27 25
D, V, Z and
special D
3 10.0 2.8 9.2 3.0 35.5 25.5 22 16 21.9 17.1
PLS Y, M 2
19.4 21.8
41.9 41.5 27 26 0.32
PLF Y, M 2 42.7 40.6 26 25 0.32
P0 TO 631
1.6 1.6 0.74 0.48 0.08
I I
ooo
1