20
Summary delta event bits provide
a consolidated view of the various
individual delta event bits,
grouped either by function or
SONET tributary. Summary delta
events are therefore a function of
the other delta events bits in the
register maps. The summary bits
are read only, and will only be
cleared when all delta event bits
that contribute to them are
cleared.
The summary bits are O/R'd to-
gether to form the HDMP-3001
interrupt outputs, INTB and
APS_INTB. The contribution of
any of these bits to the summary
interrupts can be deleted by set-
ting the corresponding mask bit.
3.6 Test
3.6.1 Loopbacks
Several loopbacks are provided
for test purposes, as shown in
Figure 8:
• Loopback 1:
SONET_R_TO_R_LOOPL,
requires STS-3c/STM-1 mode
with TX_SONETCLK =
RX_SONETCLK.
• Loopback 2:
SONET_R_TO_T_LOOP,
requires STS-3c/STM-1 mode
with TX_SONETCLK =
RX_SONETCLK.
• Loopback 3: Loopback done
on the board level.
• Loopback 4:
MII_T_TO_R_LOOP, only
supported in PHY mode, i.e.
when the HDMP-3001 drives
the MII clocks.
TX TX_LAPS
RX
RX_LAPS
F
I
F
O
OVERHEAD
MII
4
3
THIRD LOOPBACK
OUTSIDE CHIP
1
2
Figure 8. Loopbacks
The loopback modes are selected
by programming register bits in
the register map. For details
please refer to the description of
register 0x001.
In SONET loopback mode
SONET_R_TO_T_LOOPL, the
data received on the RX_DATA
pins is routed straight to the
TX_DATA pins. The data is not
processed by the chip. In SONET
loopback mode
SONET_R_TO_T_LOOP, the data
received on the RX_DATA pins is
processed by the line side receive
circuitry. After the framer the
data is looped back to the line
side transmit circuitry, from
where it is sent out on the
TX_DATA pins.
The Ethernet loopback mode can
be enabled by setting register bit
MII_LOOPBACK_MODE. In
loopback mode, the MII RX inter-
face and MII TX interface are
used together to route the MAC
frames from the MAC device back
to the MAC device. That is, the
MAC frames under test are re-
ceived from the MAC device
through the MII TX interface.
Then, the MAC frames are not
processed and are sent directly to
the MII RX interface.