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Bit 7: J0_OOF_D – J0_OOF delta bit
Bit 6: Reserved
Bit 5: RX_LAIS_D – RX_LAIS delta bit
Bit 4: RX_LRDI_D – RX_LRDI delta bit
Bit 3: RX_K1_D – RX_K1 delta bit
Bit 2: K1_UNSTAB_D – K1_UNSTAB delta bit
Bit 1: RX_K2_D – RX_K2 delta bit
Bit 0: Reserved
Receive LOH Monitor Delta Bits: If one, there is a change in state of the corresponding event bit. After the
bit is being read, CPU can reset them by writing a one.
Receive LOH Monitor Delta Bits: If zero, no change in state of the corresponding event bit.
5.4 SONET/SDH Receive Registers
ADDR=0x0F9: Receive LOH Monitor Delta
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name J0_OOF Reserved RX_LAIS RX_LRDI RX_K1_D K1_UNSTAB RX_K2_D Reserved
_D _D _D _D
R/W W1C — W1C W1C W1C W1C W1C —
Value 0000 00 00
after
reset
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name Reserved Reserved RX_LOS_D Reserved RX_OOF_D RX_LOF_D Reserved Reserved
R/W ——WIC — WIC WIC ——
Value 0000 0 0 0 0
after
reset
Bits 7-6: Reserved
Bit 5: RX_LOS_D – RX_LOS delta bit
Bit 4: Reserved
Bit 3: RX_OOF_D – RX_OOF delta bit
Bit 2: RX_LOF_D – RX_LOF delta bit
Bits 1-0: Reserved
Receive SOH Monitor Delta Bits: If one, there is a change in state of the corresponding event bit. After
reading them out, the CPU can reset the delta bits by writing a one to each bit.
Receive SOH Monitor Delta Bits: If zero, no change in state of the corresponding event bit.
ADDR=0x0FA: Receive SOH Monitor Delta