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• Pointer Bytes, H1, H2, H3
• BIP-96/24, B2
• APS bytes, K1, K2
• Synchronization Status, S1
• Line/MS REI, M1
• Transmits undefined TOH/SOH
as fixed all zeros.
• Scrambles payload using
SONET/SDH frame
synchronous descrambler,
polynomial (X
7
+ X
6
+1).
3.9.2 Receive SONET/SDH Process-
ing Overview
The Receive SONET/SDH Proces-
sor provides for the framing of the
STS signal, descrambling, TOH/
SOH monitoring including B1 and
B2 monitoring, AIS detection,
pointer processing, and POH
monitoring. The Receive SONET/
SDH Processor performs the fol-
lowing functions:
• SONET/SDH framing, [A1
A2] bytes are detected and
used for framing. Provides
OOF and LOF indicators
(single event and second
event).
• Descrambles payload
using SONET/SDH frame
synchronous descrambler,
polynomial (X
7
+ X
6
+1).
• Monitors incoming B1 bytes
and compares them to
recalculated BIP-8 values.
Provides error event
information.
• Monitors incoming B2 bytes
and compares them to
recalculated BIP-96/24 values.
Provides error event
information.
• Monitors K1 and K2 bytes,
which are used for sending
Line/MS AIS or RDI, and for
APS signaling.
• Monitors the four LSBs of
received S1 bytes for
consistent values in
consecutive frames.
• Monitors the M1 byte to
determine the number of B2
errors that are detected by the
remote terminal in its received
signal.
• Outputs the received E1, F1,
and E2 bytes and two serial
DCC channels, SDCC (D1-D3)
and LDCC (D4-D12).
• Examines the H1-H2 bytes to
establish the state of the
received pointer (Normal,
LOP, AIS). If the pointer state
is normal, the first H1H2 bytes
are read to determine the
start of the SPE/VC.
• Monitors POH bytes J1, B3, C2,
and G1 for errors or changes in
state.
• Monitors/captures J1 bytes. In
SONET applications, captures
64 consecutive J1 bytes and in
SDH applications looks for a
repeating 16 consecutive J1
byte pattern.
• Monitors C2 bytes for
verification of correct
tributary types. The tributary
is checked for five consecutive
frames with identical C2 byte
values.
• Monitors G1 for REI-P and
RDI-P.
• Monitors incoming B3 bytes
and compares them to
recalculated BIP-8 values.
Provides error event
information.
3.9.3 Transmit SONET/SDH
Processing Details
3.9.3.1 SPE/VC Structure
The first column of the SPE/VC is
the POH. The ordering of these
nine bytes is shown in Figures 12
and 13 for SONET and SDH.
J1
B3
C2
G1
F2
H4
Z3
Z4
Z5
SONET POH
J1
B3
C2
G1
F2
H4
F3
K3
N1
SDH POH
PAYLOAD CAPACITY (2340 BYTES)
POH 9 BYTES
9 ROWS
261 COLUMNS
Figure 12. The structure of the SONET STS-3c
SPE and SDH VC-4
Figure 13. STS-3c SPE or VC-4 Structure