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EOS_D_SUM group indicates
that at least one of the delta sig-
nals below is unmasked and set.
NEW_RX_MIN_ERR,
NEW_RX_MAX_ERR,
NEW_RX_OOS_ERR,
NEW_RX_FORM_DEST_ERR,
NEW_RX_FIFO_UR_ERR,
NEW_RX_FIFO_OF_ERR,
NEW_RX_FCS_HEC_ERR,
NEW_TX_FIFO_UR_ERR,
NEW_TX_FIFO_OF_ERR,
NEW_TX_ER_ERR,
NEW_TX_MII_ALIGN_ERR
3.7.4 APS_INTB
RX_APS_INT interrupt message
for APS (K1 and K2) indicates that
at least one of the RX_K1_D,
RX_K2_D, K1_UNSTAB_D is one
and the corresponding mask bits
and RX_APS_INT_MASK are zero.
3.8 Data Processing
The LAPS and GFP TX Processing
refers to the encapsulation of the
MAC (Media Access Control)
frames coming from the MII (Me-
dia Independent Interface, see
IEEE 802.3 specification) into the
LAPS/GFP frames, which are then
sent to the Line Side Interface
(SONET/SDH). Figure 9 shows an
Ethernet MAC frame, and Figure
10 a LAPS frame with a MAC pay-
load.
3.8.1 LAPS Processing
The Transmit LAPS Processor
provides the insertion of packet-
based information into the STS
SPE. It provides packet encapsu-
lation, FCS field generation,
inter-packet fill and scrambling.
The Transmit LAPS Processor
performs the following functions:
• Encapsulates packets within
an LAPS frame. Each packet is
encapsulated with a start flag
(0x7E), a 32-bit FCS field,
Address, Control and SAPI
PREAMBLE
START OF FRAME DELIMITER
DESTINATION ADDRESS (DA)
SOURCE ADDRESS (SA)
LENGTH/TYPE
MAC CLIENT DATA
FCS
7 OCTETS
1 OCTET
6 OCTETS
6 OCTETS
2 OCTETS
46 - 1500 OCTETS
4 OCTETS
BIT 7 BIT 0
MSB
LSB
OCTETS WITHIN
FRAME ARE
TRANSMITTED FROM
TOP TO BOTTOM
FLAG (0x7E)
ADDRESS (0x04)
CONTROL (0x03)
SAPI MSB (0xFE)
SAPI LSB (0x01)
DESTINATION ADDRESS (DA)
SOURCE ADDRESS (SA)
LENGTH/TYPE
MAC CLIENT DATA
FCS OF MAC
FCS OF LAPS
FLAG (0x7E)
1 OCTET
1 OCTET
1 OCTET
1 OCTET
1 OCTET
1 OCTET
BIT 8 BIT 1
MSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
MSB
MSB
MSB
MSB
MSB
MSB
MAC
FRAME
OCTETS WITHIN
FRAME ARE
TRANSMITTED FROM
TOP TO BOTTOM
6 OCTETS
6 OCTETS
2 OCTETS
46 - 1500 OCTETS
4 OCTETS
4 OCTETS
Figure 9. An Ethernet MAC frame
Figure 10. The format of a LAPS frame with a MAC payload
fields, and an end of field flag
(0x7E). All fields except the
start flag can be disabled
through configuration.
• Optional self-synchronous
transmit payload scrambler
(X
43
+1 polynomial).
• Transparency processing
(octet stuffing for Flags &
Control Escape). Byte stuffing
occurs between start and end
of field flags. Stuffing replaces
each byte within a frame that
matches the flag or control
code bytes with a two-byte
sequence.
• Provides the ability to insert
FCS errors for testing under
SW control.
• Provides for selectable
treatment of FIFO underflow.
A FIFO underflow condition
occurs when a TX FIFO empty
occurs prior to the end of a