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Address Register Name
Common Registers
0x000 Reset and Performance Latch Control
0x001 Test Modes
0x002 Reserved
0x003 Microprocessor Interrupt Pin Mode
0x004 Chip Revision
0x005 PHY Address
0x006 Interrupt Status
0x007 Event Summary
0x008 Summary Interrupt Mask
0x009 Mode of Operation
0x00A Rx Event Summary Mask
0x00B SONET/SDH Configuration
0x00C Reserved
0x00D GPIO Control
0x00E-0x00F GPIO Data
0x010-0x09B Reserved
SONET/SDH Transmit Registers
0x09C Transmit BIP Control
0x09D Transmit AIS, RDI, REI Control
0x09E Reserved
0x09F-0x0AE Transmit J0 Bytes (16)
0x0AF Reserved
0x0B0 Transmit K2 Byte
0x0B1 Transmit K1 Byte
0x0B2 Reserved
0x0B3 Transmit S1 Byte
Table 19. HDMP-3001 Register Map
5.2 Chip Register Map
The chip register map, Table 19, can be accessed through the MDIO,
microprocessor and EEPROM interfaces.
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