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ADDR = 0x1E4-E7: Receive FIFO Overflow Error
ADDR Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name 0x1E4 RX_FIFO_OF_ERR [7:0]
0x1E5 RX_FIFO_OF_ERR [15:8]
0x1E6 Fixed 0
0x1E7 Fixed 0
R/W RO
Value 0
after
reset
RX_FIFO_OF_ERR is the RX FIFO Overflow Error counter. It is non-resetable except that a hard or soft
reset will clear it. After reaching its max value the counter starts over from zero again. This counter is
incremented each time there is a FIFO overflow and hence a frame is discarded.
ADDR = 0x1E8-EB: Receive FIFO Underrun Error
ADDR Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name 0x1E8 RX_FIFO_UR_ERR [7:0]
0x1E9 RX_FIFO_UR_ERR [15:8]
0x1EA Fixed 0
0x1EB Fixed 0
R/W RO
Value 0
after
reset
RX_FIFO_UR_ERR is the RX FIFO Underrun Error counter. It is non-resetable except that a hard or soft
reset will clear it. After reaching its max value the counter starts over from zero again. This counter is
incremented each time there is a FIFO underrun and hence a frame is discarded.