58
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name TEST_K1[7:0]
R/W R/W
Value 0 0 00 00 0 0
after
reset
ADDR=0x0B1: Transmit K1 Byte
TX_K1[7:0]: These bits are automatic protection switching (APS) signaling.
The HDMP-3001 inserts TX_K1[7:0] into the transmitted K1 byte, and TX_K2[7:3] into the five MSBs of the
transmitted K2 byte. The three LSBs are controlled according to the description above (ADDR=0x0b0).
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name TEST_S1[7:0]
R/W R/W
Value 0 0 00 00 0 0
after
reset
ADDR=0x0B3: Transmit S1 Byte
TX_S1[7:0]: The transmitted S1 byte of the HDMP-3001 is set equal to TX_S1[7:0].
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name Reserved Reserved Reserved Reserved Reserved PREI_INH PRDI_ENH PRDI_AUTO
R/W ———— — R/W R/W R/W
Value 0000 0 0 0 0
after
reset
Bits 7-3: Reserved
Bit 2: PREI_INH: If one, the four LSBs of G1 are set to zero. If zero, the four LSBs of G1 are set to the
value equal to B3 errors by the receive side POH monitoring block in binary value (0000 through
1000).
Bit 1: PRDI_ENH: If one, HDMP-3001 generates an enhanced RDI signal automatically when
PRDI_AUTO = 1.
Bit 0: PRDI_AUTO: If zero, the value transmitted in bits 7:5 of G1 is taken from the TX_G1[2:0].
Table 20 shows the values transmitted in bits 5, 6 and 7 of G1.
ADDR=0x0B4: Transmit G1 Control