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Interrupt Output Int Active Description
Mode[1:0] Configured Level
Type
00 Open-Drain 0 Interrupt output INT is asserted with 0 and de-asserted with Z
(Default) (O/D) externally. An external resistive pull-up is needed. Output buffer OEN is
driven by an inversion of the internally maskable active-high interrupt
signal. Output buffer’s input pin is driven to 0. An internally
maskable interrupt active value of 1 causes an external interrupt
active value of 0. Refer to Figure 20.
01 Open-Source 1 Interrupt output INT is asserted with 1 and de-asserted with Z
(O/S) externally. An external resistive pull-down is needed. Output buffer OEN
is driven by an inversion of the internally maskable active-high
interrupt signal. Output buffer’s input pin is driven to 1. An
internally maskable interrupt active value of 1 causes an external
interrupt active value of 1. Refer to Figure 21.
10 Always 0 Interrupt output INT is asserted with 0 and de-asserted with 1
Enabled externally. Output buffer OEN is always driven to 0. Output buffer’s
Active-0 input pin is driven by an inversion of the internally maskable active-high
interrupt signal. An internally maskable interrupt active value of
1 causes an external interrupt active value of 0. Refer to Figure 22.
11 Always 1 Interrupt output INT is asserted with 1 and de-asserted with 0
Enabled externally. Output buffer OEN is always driven to 0. Output buffer’s
Active-1 input pin is driven by the internally maskable active-high interrupt
signal. An internally maskable interrupt active value of 1 causes an
external interrupt active value of 1. Refer to Figure 23.
Table 15. INT Pin Configuration
OEN
INT
VDD
CHIP
PCB
GND
msk_int
OEN
INT
VDD
CHIP
PCB
GND
msk_int
OEN
INT
CHIP
PCB
GND
msk_int
OEN
INT
CHIP
PCB
GND
msk_int
Figure 20. Mode = 00, O/D (Default)
Figure 21. Mode = 01, O/S
Figure 22. Mode = 10, Always Enabled,
Active-0
Figure 23. Mode = 11, Always Enabled,
Active-1
NOTE: msk_int is the internally maskable active-high interrupt signal.