Hitachi HD6433690G TV Mount User Manual


 
Rev. 1.0, 07/01, page 20 of 372
Table 2-3 Arithmetic Operations Instructions (2)
Instruction Size
*
Function
DIVXS B/W Rd ÷ Rs Rd
Performs signed division on data in two general registers: either 16 bits ÷
8 bits 8-bit quotient and 8-bit remainder or 32 bits ÷ 16 bits 16-bit
quotient and 16-bit remainder.
CMP B/W/L Rd – Rs, Rd – #IMM
Compares data in a general register with data in another general register
or with immediate data, and sets CCR bits according to the result.
NEG B/W/L 0 – Rd Rd
Takes the two's complement (arithmetic complement) of data in a
general register.
EXTU W/L Rd (zero extension) Rd
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by padding with zeros on the
left.
EXTS W/L Rd (sign extension) Rd
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by extending the sign bit.
Note: * Refers to the operand size.
B: Byte
W: Word
L: Longword