Hitachi HD6433690G TV Mount User Manual


 
Rev. 1.0, 07/01, page 1 of 372
Section 1 Overview
1.1 Overview
High-speed H8/300H central processing unit with an internal 16-bit architecture
Upward-compatible with H8/300 and H8/300H CPUs on an object level
Sixteen 16-bit general registers
62 basic instructions
Various peripheral functions
Timer A (can be used as a time base for a clock)
Timer V (8-bit timer)
Timer W (16-bit timer)
Watchdog timer
SCI (Asynchronous or clocked synchronous serial communication interface)
I
2
C Bus Interface (conforms to the I
2
C bus interface format that is advocated by Philips
Electronics)
10-bit A/D converter
On-chip memory
ROM Model ROM RAM
Flash memory
(F-ZTAT) Version
H8/3694F HD64F3694G, HD64F3694 32 kbytes 2,048 bytes
Mask ROM H8/3694 HD6433694G, HD6433694 32 kbytes 1,024 bytes
Version H8/3693 HD6433693G, HD6433693 24 kbytes 1,024 bytes
H8/3692 HD6433692G, HD6433692 16 kbytes 512 bytes
H8/3691 HD6433691G, HD6433691 12 kbytes 512 bytes
H8/3690 HD6433690G, HD6433690 8 kbytes 512 bytes
General I/O ports
I/O pins: 29 I/O pins, including 8 large current ports (I
OL
= 20mA, @V
OL
= 1.5V)
Input-only pins: 8 input pins (also used for analog input)
Supports various power-down states
Compact package
Package (Code) Body Size Pin Pitch
LQFP-64 (FP-64E) 10.0
×
10.0 mm 0.5 mm
QFP-64 (FP-64A) 14.0
×
14.0 mm 0.8 mm
QFP-48 (FP-48F) 10.0
×
10.0 mm 0.65 mm