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6.2 PID Control Instruction (Exact Differential)
6.2.4 PIDPRMW instruction
6-29
PIDPRMW
6
PID CONTROL
INSTRUCTION
PIDPRMW
Precautions
The following table shows the CPU modules applicable to the PID control instructions (inexact
differential) and the PID control instructions (exact differential).
: Applicable, : Not applicable
Device Data item Description
Setting range
Setting
side
Processing when the
setting data are outside the
setting range
With PID limits
Without PID
limits
+8
MV change rate
limit
( MVL)
Set the variation limit
between the previous
MV and the present MV.
When the MV variation is
greater than the limit
value, bit 1 (b1) of the
alarm device is set to '1'.
MV variation is not
limited. (Even if the MV
variation exceeds the
limit value, the actual MV
variation is used as it is
for calculating the MV.)
0 to 2000
-32768 to
32767
User
In the case of "With PID
limits", the PID operation is
performed after values are
replaced as follows:
• MVL value is less than
0,
the value is clipped to 0.
• MVL value is greater
than 2000,
the value is
clipped to 2000.
+9
PV change rate
limit
( PVL)
Set the variation limit
between the previous PV
and the present PV.
When the PV variation is
greater than the limit
value, bit 0 (b0) of the
alarm device is set to '1'.
PV variation is not
limited. (Even if the PV
variation exceeds the
limit value, the actual PV
variation is used as it is
for performing the PID
operation.)
0 to 2000
-32768 to
32767
User
In the case of "With PID
limits", the PID operation is
performed values are
replaced as follows:
• If the PVL value is
less than 0,
the value is
clipped to 0.
• If the PVL value is
greater than 2000,
the
value is clipped to 2000.
CPU module model
Inexact
differential
Exact
differential
Basic model QCPU
The first five digits of the serial number are
'04121' or lower.
The first five digits of the serial number are
'04122' or higher
High Performance model
QCPU
The first five digits of the serial number are
'05031' or lower.
The first five digits of the serial number are
'05032' or higher.
Redundant CPU
Universal model QCPU
LCPU
s
s