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How Do I
Re-configure the
Logic Analyzer?
In order to make this measurement, you must re-configure the logic
analyzer so Analyzer 2 is a timing analyzer. You leave Analyzer 1 as a
state analyzer since you will use the state analyzer to trigger on address
8930.
Configure the logic analyzer so Analyzer 2 is a timing analyzer as shown:
Connecting the
Timing Analyzer
Probes
At this point you would connect the probes of pods 4 and 5 as follows:
• Pod4bit0toaddressstrobe(AS)
• Pod4bit1tothesystemclock
• Pod4bit2tolowdatastrobe(LDS)
• Pod4bit3toupperdatastrobe(UDS)
• Pod 4 bit 4 to the read/write (R/W)
• Pod4bit5todatatransferacknowledge(DTACK)
• Pod5bits0through7toaddresslinesA0throughA7
• Pod 5 bits 8 through 15 to data lines D0 through D7
Figure 12-5. State/Timing E Configuration Menu
Using the Timing/State Analyzer HP 16510B
12-8 Front-Panel Reference