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68000 and 68010
(64-pin DIP)
CPU Package: 64-pin DIP
Accessories Required: HP 10311B Preprocessor
HP 10269C General Purpose Probe Interface
Maximum Clock Speed: 12.5 MHz clock input
Signal Line Loading: Maximum of one 74S TTL load + one 74F TTL load
+35pFonanyline
Microprocessor Cycles Identified: User data read/write
User program read
Supervisor read/write
Supervisor program read
Interrupt acknowledge
Bus Grant
6800 cycle
Additional Capabilities: The logic analyzer captures all bus cycles,
including prefetches
Maximum Power Required: 0.4 A at + 5 Vdc, supplied by the logic
analyzer
Number of Probes Used: Three 16-channel probes
HP 16510B Microprocessor Specific Measurements
Front-panel Reference 14 - 13