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19 BUILT-IN I/O FUNCTION
19.1 High-speed Counter Function
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■Operation Description
The content of the operation when ON and when OFF is as follows.
These devices do not operate when the FX3 compatible high-speed counter function is valid.
■Update timing
The timing of device update is as follows.
• Cannot be modified while the high-speed counter is operating. Operates in the configured status when the
high-speed counter starts.
• The ring length setting is disabled if the pulse density measurement mode or rotational speed measurement
mode is selected.
Precautions
If these devices are turned on when a high-speed counter's current value is out of the ring length range, the current value
when the high-speed counter is operated is as follows.
• Lower than lower limit value Lower limit value
• Higher than upper limit value Upper limit value
High-speed comparison table (high-speed compare instruction) operation
This device is for monitoring the operational status of the high-speed counter's high-speed comparison table and the high-
speed comparison instruction.
■Corresponding devices
The device number is shared for all channels.
■Operation Description
The content of the operation when ON and when OFF is as follows.
These devices also operate when the FX3 compatible high-speed counter function is valid.
■Update timing
The timing of device update is as follows.
Operation when ON Operation when OFF
Enables the ring length setting for a ring counter
(Counts in the range of 0 to ring length counter-1)
Disables the ring length setting for a ring counter
(Counts in the range of -2147483648 to +2147483647)
ON OFF
• When ON by the user
• When set to enabled with parameters
• When OFF by the user
• When set to disabled with parameters
CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8
SM4980
Operation when ON Operation when OFF
High-speed comparison table operating
When the high-speed counter current value and the high-speed comparison
table set value or the DHSCS, DHSCR, DHSZ instruction set value are equal,
the specified bit device is set or reset.
High-speed comparison table stopped
Even when the high-speed counter current value and the high-speed
comparison table set value or the DHSCS, DHSCR, DHSZ instruction set
value are equal, the specified bit device does not change.
ON OFF
• Match output driven by the DHIOEN instruction
• ON execution by DHSCS, DHSCR, DHSZ instruction
• Match output stopped by the DHIOEN instruction and DHSCS, DHSCR,
DHSZ instructions all OFF
• Power ON, reset, STOP, PAUSE