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CHAPTER 3 SPECIFICATIONS
3
3.4 I/O Signals from/to the CPU Module
3.4.1 I/O signal list
(2) Output signal list
If a "Use prohibited" area is turned on/off through a sequence program, the QD73A1's function cannot be guaranteed.
Output signal (CPU module QD73A1) Output signal (CPU module QD73A1)
Device No. Signal name Device No. Signal name
Y10
Use prohibited
Y20 OPR start signal
Y11 Y21 Absolute positioning start signal
Y12 Y22 Forward start signal
Y13 Y23 Reverse start signal
Y14 Y24 Forward JOG start signal
Y15 Y25 Reverse JOG start signal
Y16 Y26 Speed-position mode restart signal
Y17 Y27 Stop signal
Y18 Y28 Error reset signal
Y19 Y29 Overflow reset signal
Y1A
Zero/gain adjustment data writing request
signal
Y2A Underflow reset signal
Y1B
Zero/gain adjustment change request
signal
Y2B Use prohibited
Y1C Set value change request signal Y2C Speed-position switching enable signal
Y1D
Use prohibited
Y2D PLC READY signal
Y1E Y2E
Use prohibited
Y1F Y2F