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CHAPTER 3 SPECIFICATIONS
3
3.4 I/O Signals from/to the CPU Module
3.4.3 Details of output signals
(14)Underflow reset signal (Y2A)
Turn on this signal to turn off Underflow signal (X1A) when it is on.
For the on/off timing of this signal, refer to the detail of Underflow signal (X1A). ( Page 34, Section 3.4.2 (11))
(15)Speed-position switching enable signal (Y2C)
Use this signal to enable/disable Speed-position switching command signal (CHANGE) in the speed-position
control switch mode.
Turn on this signal to enable Speed-position switching command signal (CHANGE). Turn off this signal to disable
Speed-position switching command signal (CHANGE).
(16)PLC READY signal (Y2D)
This signal notifies the QD73A1 that the CPU module is operating normally.
This signal needs to be turned on beforehand to start OPR, major positioning, or JOG operation.
This signal needs to be turned off beforehand to write fixed parameters and OPR parameters.
When this signal is turned on, the QD73A1 performs the following.
• 1: Checking fixed parameters
• 2: Turning on QD73A1 READY signal (X11)
• 3: Turning off Excessive error signal (X17) when it is on
When this signal is turned off while BUSY signal (X14) is on, the QD73A1 processes a deceleration stop.
When this signal is turned on while BUSY signal (X14) is on, the QD73A1 does not perform the operations 1 to 3
above.
OFF
ON
OFF
ON
ON
BUSY signal (X14)
QD73A1 READY signal (X11)
PLC READY signal (Y2D)
Deceleration followed by PLC
READY signal (Y2D) OFF
Even when PLC READY signal
(Y2D) is turned on, the operations
1 to 3 are not performed.
Executed by the QD73A1